The present invention generally relates to semiconductor devices and more particularly to a compound semiconductor device having a reduced resistance at a cap layer interface.
Compound semiconductor devices such as HEMTs and HBTs are used extensively in high frequency applications where high speed device operation is essential. In compound semiconductor devices, large electron mobility, which is pertinent to compound semiconductor materials, facilitates the high speed operation of the device substantially.
Generally, a compound semiconductor device includes a heterojunction interface of AlGaAs and GaAs in the essential part of the device. For example a HEMT uses such a heterojunction interface between the channel layer formed of an undoped GaAs and an electron supplying layer of an n-type AlGaAs for creating a layer of two-dimensional electron gas in the channel layer along the foregoing heterojunction interface. On the other hand, a typical HBT uses an emitter layer of n-type AlGaAs formed on a base layer of p-type GaAs. By using a widegap material such as AlGaAs for the emitter layer, one can increase the current gain of the device. Further, by using GaAs that exhibits a very large electron mobility, it is possible to maximize the operational speed of the device.
In order to avoid the formation of various non-radiative recombination centers associated with the deep impurity levels existing in the AlGaAs layer, recent compound semiconductor devices are increasingly using InGaP in place of the AlGaAs layer. It should be noted that such non-radiative recombination centers facilitates degradation of the device.
In conventional compound semiconductor devices including a GaAs/AlGaAs heterojunction interface, it has been practiced to provide a cap layer of GaAs doped to the n.sup.+ -type on the AlGaAs layer for protecting the same from oxidation and for providing an ohmic contact thereto.
FIG. 1 shows an example of an HBT that uses InGaP for the emitter layer.
Referring to FIG. 1, a sub-collector layer 11 of n-type GaAs is provided on a semi-insulating GaAs substrate 10, followed by a deposition of a collector layer 12 of GaAs on the sub-collector layer 11. Further, a base layer 13 of p-type GaAs is grown on the collector layer 12, and an emitter layer 14 of InGaP doped to the n-type by Si is deposited further thereon. The emitter layer 14 thus formed, in turn, is covered by a cap layer 16 of GaAs doped to the n-type by Si. Thereby, a layered semiconductor body including the semiconductor layers 11-16 on the substrate 10 is obtained. It should be noted that the deposition of the layers 11-16 is achieved consecutively one after another by employing a vapor phase deposition process such as MOVPE process.
After the formation of the cap layer 16, the layered semiconductor body formed as such is subjected to an etching process for partially removing the cap layer 16, the emitter layer 14 and the base layer 13, such that a part of the sub-collector layer 11 and a part of the base layer 13 are exposed. By providing ohmic electrodes 17, 18 and 19 respectively on the cap layer 16, the exposed surface of the base layer 18 and the exposed surface of the sub-collector layer 11, the fabrication of the HBT is completed.
The HBT having such a construction achieves injection of electrons into the base layer 13 from the emitter layer 14 and further into the collector layer 12 from the base layer 13, similarly to ordinary bipolar transistors, wherein the operational speed of the device is improved significantly as a result of use of GaAs for the base layer 13. Further, a large gain is achieved as a result of use of InGaP, which is a wide gap material, for the emitter layer 14. As noted before, such an HBT that uses InGaP for the emitter layer in place of conventional AlGaAs minimizes the problem of degradation of the device caused by non-radiative recombination centers.
FIG. 2 shows an example of a conventional HEMT that uses InGaP for the electron supplying layer.
Referring to FIG. 2, a buffer layer 22 of undoped GaAs is deposited on a semi-insulating GaAs substrate 21, followed by a deposition of a channel layer 23 of undoped GaAs on the buffer layer 22. Further, a spacer layer 24 of undoped InGaP is deposited on the channel layer 23, followed by a deposition of an electron supplying layer 25 of n-type InGaP on the spacer layer 24. Finally, a cap layer 27 of n-type GaAs is deposited on the electron supplying layer 25. Thereby, a layered semiconductor body including the layers 22-27 on the substrate 21 is obtained similarly to the HBT of FIG. 1, wherein the deposition of the-layers 22-27 is achieved consecutively one after another by a MOVPE process.
After the layered semiconductor body is formed as such, a part of the cap layer 27 is removed by an etching process in correspondence to the channel region of the device, and a Schottky electrode 28 is provided on the exposed part of the electron supplying layer 25 as a gate electrode. Further, a pair of ohmic electrodes 291 and 292 are provided on the cap layer 27 at both sides of the Schottky electrode 28 respectively as a source electrode and a drain electrode.
In such a construction, a two-dimensional electron gas is formed in the channel layer 23 along the heterojunction interface between the channel layer 23 and the spacer layer 24 thereon as is well known in the art. By applying a control voltage to the gate electrode 28, one can control the source-drain current flowing between the source electrode 291 and the drain electrode 292 through the two-dimensional electron gas.
In the HEMT of such a construction, the problem of degradation of the device due to donor-related deep level (DX-center) is successfully avoided, by using InGaP for the spacer layer 24 and further for the electron supplying layer 25, in place of conventional AlGaAs.
In any of the HBT and HEMT of FIGS.1 and 2, however, there appears a problem of increased resistance at the heterojunction interface where a layer of GaAs is grown on a layer of InGaP to form a GaAs/InGaP structure. For example, a high resistance layer 20 appears in the structure of FIG. 1 at the interface where the cap layer 16 of GaAs is grown on the emitter layer 14. similarly, a high resistance layer 30 appears in the structure of FIG. 2 at the interface where the cap layer 27 of GaAs is grown on the electron supplying layer 25 of InGaP. When such a high resistance layer such as the layer 20 or layer 30 is formed, the operational speed of the device is seriously deteriorated. For example, it was discovered that an HBT having an electrode of 2.times.5 .mu.m.sup.2 shows an emitter resistance of 35-40 .OMEGA. in the open-collector state. In such a case, it was found that the characteristic frequencies f.sub.T and f.sub.max of the bipolar transistor becomes 20 GHz and 50 GHz respectively, which are insufficient for the desired high frequency operation of the device.
The reason of formation of such an undesirable high resistance layer is attributed to the mutual diffusion of the group V elements at the heterojunction interface. More specifically, the semiconductor material of InGaP shows a relatively high partial pressure of P, and thus, P atoms readily escape from a layer of InGaP, leaving a vacant site in the crystal structure of InGaP. When a MOVPE deposition of GaAs is made in such a state, the As atoms easily penetrate into the crystal structure of InGaP and occupy the vacant site of P, resulting in a mixing of P and As atoms in the InGaP layer at the interface to the GaAs layer. When such a mutual diffusion of P and As occurs at the heterojunction interface, there occurs a distortion in the crystal lattice due to the large difference in the atomic radius of the P and As atoms. It should be noted that such a distortion of the crystal lattice disturbs the periodic arrangement of atoms in the crystal lattice and induces a formation of deep impurity levels or carrier traps, which in turn leads to a depletion of carriers at the heterojunction interface. It is believed that the increase of resistance at the layer 20 or 30 is attributed to such a depletion of the carriers.